Solids and semiconductor deviceFlame Institute

The energy of an electron in an isolated atom is decided by the orbit in which it is revolving. In a solid, these electron energies would be different because of the presence of many atoms placed close to each other. This would make the nature of electron motion in a solid different from that in an isolated atom.

In a solid, the atoms are held together closely in a well defined 3-dimensional array or lattice by strong forces as the separation between them is quite small, nearly twice the radii of the outermost electronic orbits. In conducting metals like Al, Cu etc, the outer orbit electrons are shared by all the atoms and the metallic crystal can be visualised as positive inner cores embedded in a regular fashion in a sea of shared electrons.

Such electrons are obviously free to travel.

For insulators the outermost electron remains bound to their parent atoms almost at all temperatures and very high energies are required for these electrons to breakaway. Therefore conductivity is low or resistivity is high.

The bonding in semiconductors is such that at low temperatures the conductivity of most of the semiconductor is low and comparable to those of insulators but under thermal excitation at moderate temperatures bonded electrons can freely to wander give moderate values of conductivity.

The term intrinsic semiconductor refers to pure materials. Si and Ge have four valence electrons. In its crystalline structure, every Si or Ge atom tends to share one of its four valence electrons with each of its four nearest neighbours atoms. These shared electron pairs are referred to as forming a covalent bond.

As the temperature increases, more thermal energy becomes available to these electrons and some of these electrons may break away, becoming free electrons contributing to conduction.

This vacancy with an effective positive electronic charge is called hole. Creation or liberation one free electron by the thermal energy has created one hole. Therefore intrinsic charge carriers such that

n_e = n_H = n_i

Semiconductors possess the unique property in which, apart from electrons, the holes also move. These holes move towards negative potential, giving the hole current I_G and the free electron moves completely independently and gives rise to an electron current (I_e) under an applied electric field. The total current is the sum of the electron current I_e due to the thermally generated conduction electrons and the whole current I_h.

The intrinsic semiconductor materials, charge carries are always thermally generated can never have either predominant hole or electron for conduction, this limits the usefulness of such materials.

To overcome this problem, a small amount say ~ 1 part per million (PPM) of suitable impurity is added to the pure semiconductor such materials are known as extrinsic semiconductors, the impurity atoms are called dopants.

We choose the dopant element from nearby fifth or third group, so that the size of the dopant atoms is nearly the same as that of Si and Ge. Interestingly, the pentavalent and trivalent dopants in Si or Ge give two entirely different types of semiconductors.

(a) n-type semiconductor: If we dope Si or Ge (valency) with a pentavalent (valency 5) four of its electrons bond with the four silicon neighbours while the fifth electron is free to move. Thus, the pentavalent dopant is donating one extra electron for conduction and hence is known as n-type semiconductors. For such materials n_e >> n_h. The total number of conduction electrons n_e is due to combined contribution of the donors as well as the thermally generated carries while the holes n_h continue to be only due to the thermal process. These materials are known as n-type semiconductors. For such materials n_e >> n_h.

(b) p-type semiconductor: When Si or Ge (tetravalent) is doped with group –III trivalent has one outer electron less than Si or Ge. The dopant has one outer electron less than Si or Ge and therefore, this atom can form bonds from three sides with Si and fails to form bond on one side. Some of the outer bound electrons in the neighbourhood have a tendency to slide into this vacant bond as shown in figure, leaving a vacancy or hole at its own site. This hole is available for conduction. These holes are in addition to the thermally generated holes. Thus, for such a material, the holes are the majority carriers. For p-type material n_h >> n_e or p >> n.

The neighbourhood, from which the free electron (with charge–q) has come out leaves a vacancy with an effective charge (+q) to slide into this vacant bond as shown in figure, leaving a vacancy or hole at its own site. This hole is available for conduction. It is obvious that these holes are in addition to the thermally generated holes while the source of conduction electrons is only thermal generations. The holes are the majority carriers and electrons are minority carriers for such a material.

n_h >> n_e

In the bond description of solids the bonding electrons and holes have been considered as highly localised, which is not exact due to strong overlapping of the orbitals, alternative approach is termed as energy-band description of solids. The electron energies in solids, in view of strong overlap of different atomic orbitals, will be more like an energy band instead of discrete energy levels of single isolated atoms.

In crystal, the atoms are close to each other and therefore the electrons interact with each other and also with the neighbouring atomic cores. The overlap or interaction will be more felt by the electrons in the outermost orbit while the inner orbit or core electron energies may remain unaffected.

When these atoms start coming nearer to each other to form a solid. The total number of available energy states 8N has been re-apportioned between the two bonds (4N states each in the lower and upper energy bands). Here the significant point is that there are exactly as many states in the lower band (4N) as there are available valence electrons from the atom (4N)

Therefore, this band (called the valence band) is completely filled while the upper band is completely empty. The upper band is called the conduction band.

The gap between the top of the valence band and bottom of the conduction band is called the energy band gap (energy gap)

In case of metal, bands are overlapping Eg = 0

For insulator, large band gap Eg exists (Eg > 3eV).

For semiconductor finite but small band gap (E_g < 3eV)

An intrinsic semiconductor will behave like an insulator at T = 0 K. It is the thermal energy at high temperature (T > 0K) which excites some electrons from the valence band (thus creating an equal number of holes in the valence band) to the conduction band.

In case of extrinsic semiconductors, additional energy states, apart from E_C and E_V due to donor impurities (E_D) and acceptor impurities (E_A) also exist. We know that very small energy (~0.1eV) is required for the electrons to be released from the donor impurity in the n-type semiconductor. Hence the donor energy E_D lies very near the bottom of the conduction band.

Energy–Band diagrams description is grossly approximate and hypothetical. It helps in understanding the difference between metals insulators and semiconductors in a simple manner.

In a p-n junction because of concentration gradient, electrons from n-side will diffuse towards the p-side of the junction while holes from the p-side will go towards the n-side. These electrons holes have come from donor or acceptor impurity atom cores. Such donor or acceptor atoms will get depleted of their associated electrons or holes and subsequently will be left with a charged ion core in the layer near the junction boundary as shown in figure.

Consequence of the formation of depletion layer is the appearance of a junction potential and that will opposes any further diffusion of the majority carries from either sides. This potential acts as a barrier and hence is known as barrier potential V_B. Therefore the energy difference qV_B has to be surmounted before any charge carrier can flow across the junction.

5.1 BEHAVIOUR OF P-N JUNCTION WITH AN EXTERNAL APPLIED VOLTAGE OR BIAS

Forward bias

The applied voltage V (or bias V) is opposite to the junction barrier potential (n-side is negative and p-side is positive). The consequences of this are the effective potential decreases as to help the flow of current due to the majority carriers. It is known as forward bias.

Reverse bias

The applied bias V and the barrier potential V_B are in the same direction (n –side is positive and p-side is negative). As a result, the junction width will increase. The higher junction potential would restrict the flow of majority carriers to a much greater extent. The reverse bias current will be due to the minority carries only, the reverse bias current is small.

5.2 VOLTAGE-CURRENT (V-I) CHARACTERISTICS OF A p-n JUNCTION DIODE

In the p-n junction there are two electrode connections, one on the p-side and another on the n-side. It is generally called as diode, represented symbolically as shown in figure.

The direction of the arrow indicates the conventional direction of flow of current (when the diode is forward biased). In forward biasing the current first increases very slowly almost negligibly, till the voltage across the diode crosses a certain value. This voltage is called the threshold voltage or cut in voltage (~ 0.2V for germanium diode ~ 0.7V for silicon diode)

In reverse bias, the current is very small (~ mA) and almost remains constant with bias. It is called reverse saturation current. However for special cases at very high reverse bias (breakdown voltage) the current suddenly increases. The general purpose diodes are not used beyond the reverse saturation current region.

The forward bias, resistance is low as compared to the reverse bias resistance, therefore p-n diode primarily restricts the flow of current only in one direction. This property has been used to restrict the voltage variation of ac to one direction only, a phenomenon known as rectification.

5.3 APPLICATION OF p-n DIODE AS A RECTIFIER

As shown in figure, the secondary of the transformer supplies the desired ac voltage across A and B. When the voltage A is positive, the diode conducts, when A is negative, the diode is reverse biased and it does not conduct and we get an output voltage as shown in figure.

The out put voltage, though still varying is restricted to only one direction and is said to be rectified. This circuit is known as HALF WAVE RECTIFIER because only half cycle we get a voltage in the output.

5.4 FULL WAVE RECTIFIER

Using two diodes, shown in figure gives rectified out put voltage corresponding to the positive as well as negative half of the ac cycle. The secondary of the transformer is wound into two equal parts. The voltage at any instant at A (input of diode D₁) and B (input of diode D₂) with respect to the centre tap are out of phase with each other because of that we get output voltage during the +ve as well as the –ve half of cycle (during the full wave). Therefore this circuit is known as full wave rectifier.

The rectified voltage is still varying voltage but restricted to only one direction. From this rectified voltage, we can obtain dc voltage by filtering out the ac components. In general, a high value of c provides a low impedance path ac but high, almost infinite impedance to dc . Hence ac is by passed through c or filtered. DC like voltage appears at the load.

5.5 SPECIAL PURPOSE p-n JUNCTION DIODES

Consider a p–n junction where both p-and n-sides having high dopant densities, the depletions layer junction width is small and the junction field will be high. A small voltage may give a large field because junction width is < 10^–7m. The high junction field may strip an electron from the valence band. Such a mechanism of emission of electrons after a certain critical field or applied voltage V_z which gives rise to a high reverse current or breakdown current as shown in figure. This breakdown due to the band-to-band tunnelling is termed as zener breakdown and such a diode is called zener diode.

After the breakdown a large change in the current can be produced by almost insignificant change in the reverse bias voltage. This concept led to the use of zener diode as dc voltage regulator.

Zener diodes with different breakdown voltages can be obtained by changing the doping concentration on its p–and n-sides since they would, change junction width.

5.6 AVALANCHE DIODE

If the doping concentrations of p-and n-sides are not as high as for the case of Zener diode. Such diodes will have relatively wider junction widths for which the tunnelling will not be easily possible. Nonetheless at very high reverse bias, already existing electrons and holes are accelerated in the junction field and may undergo many collisions with the atoms in the crystal. Some of these impacts may be very severe so as to knock-off electrons from the outer orbits of the crystal atoms. These new electron hole pairs created by impact ionisation also get accelerated in the junction field and collide.

Further with the crystal atoms giving an increasing number of new electrons and holes. Thus a chain of collisions get started, gives rise to very much enhanced number of charge carriers leading to a rapid increase in the junction current at reverse bias beyond a certain critical value. This phenomenon is known breakdown and the device is referred to as avalanche diode.

5.7 PHOTONIC p-n JUNCTION DEVICE

The general principle of all semiconductor based photodetectors is the electron-excitation from the incident of a photon on a semiconductor, such that its energy is greater than the band gap of the semiconductor. This photon will excite an electron from the valence band to the conduction and leaving a vacancy or hole in the valence band. Thus an electron-hole pair is generated, which obviously increases the conductivity of the semiconductor. Therefore by measuring the change in conductance of the semiconductor one can measure the intensity of the optical signal. Such more commonly used photon detecting devices are photodiodes.

We know that, in p-n junction the current can only flow with applied forward bias. The diodes are generally reverse biased when used as photodiode.

The electron and hole pairs generated in the depletion layer (or near the junction) will be separated by the junction field and made to flow across the junction. A measurement of the change in the reverse saturation current on illumination can give the values of the light intensity.

5.8 SOLAR CELL

Solar cell is a device which generate voltage due to the bombardment of optical photons without applying external bias and for more power active junction area is kept large. Different type of solar cells can be obtained by using different types of junctions.

When light (with hn < E_g) falls at the junction, electron-hole pairs are generated which move in opposite directions due to the junction field. If no external load is connected, they would be collected at the two sides of the junction giving rise to a photo-voltage when external load is connected, a photo-current I_L flows. A typical V-I characteristic of the solar cell is shown in figure.

CONSTRUCTION OF SOLAR CELL

An n-type semiconductor substrate (backed with a current collecting metal electrode) is taken, over which a thin p-layer is grown on top of the p-layer; metal finger electrodes are prepared so that there is enough space between the fingers for the light to reach p-layer and the underlying p-n junction to be able to produce photo-generated holes and to electrons.

5.9 LIGHT EMITTING DIODE

These are forward-biased p-n junctions, which emit spontaneous radiation, when electron falls from the higher to lower energy level containing holes, the energy in the form of light radiation is released.

The semiconductor used in LED is chosen according to the required wavelength of emitted radiation. The visible wavelength is from 0.45 mm to 0.7mm (Energy 2.8 eV to 1.8 eV) Si (E_g ~1.1eV) or Ge (E_s~ 0.7 eV) are not suitable, since E_s is less than the minimum required E_g of 1.8 eV)

Following are the advantages over conventional incandescent lamps:

Fast action and no warm up time required
Low operational voltage and less power
The band width of emitted light is 100 Å to 500 Å or in other words it is nearly monochromatic.
Long life

5.10 DIODE LASER

It is an interesting variant of LED in which its special construction helps to produce stimulated radiation as in laser. Due to the dc bias, the electrons go to the higher energy level (i.e. conduction band) and when a photon of energy hn = E_g impinges the device, while it is still in the excited state due to the applied bias, the system is immediately stimulated to make its transition to the valance band and gives an additional photon of energy hn which is in phase with the incident photon.

The stimulated radiation in the plane perpendicular to the depletion layer builds up due to multiple reflections in the cavity formed by these surfaces and highly directional coherent radiation is emitted.

Transistor is obtained by sandwiching either p-type or n-type semiconductor between a pair of opposite type of semiconductor as shown in figure. Therefore, there are two types of transistors. i.e. (i) p-n-p (ii) n-p-n.

Emitter

This supplies a large number of majority carriers. It is of large size and heavily doped semiconductor.

Base

It is very thin and lightly doped. This is the central block.

Collector

The collector side is moderately doped and larger in size as compared to the emitter. This collects a major portion of the majority carriers supplied by the emitter.

In general, the emitter- base junction of a transistor is forward biased while collector base junction is reverse biased as shown in figure.

Considering the case of a biased p-n-p transistor shown in figure. As the emitter base junction is forward biased, a large number of holes (majority carriers) from p-type emitter block flow towards the base. These constitute the current through the emitter, I_E. These holes have a tendency to combined with the electrons in the n-region of the base only a few holes (less than 5%) are able to combine with the electrons in the base –region because the base is lightly doped and very thin.

In the collector region, these holes see the favourable negative potential at the collector and hence they easily reach the collector terminal to constitute the collector current I_C. Emitter current is the sum of collector current and base current.

(I_C >> I_B)

Similar description can be made for a biased n-p-n transistor as shown in figure.

6.1 BASIC TRANSISTOR CIRCUIT CONFIGURATIONS AND TRANSISTORS CHARACTERISTICS

There has to be two terminals for input and two terminals for output in any electronic circuit or device. In transistor (1) emitter (2) base and (3) collector are available. Therefore in a circuit one of these (E, B or C) is common to both the input and output. Therefore, the transistor can have three following configurations as shown in figure.

(a) Common Emitter (CE)

(b) Common Base (CB)

We shall restrict our selves only to CE configuration. The variation of current on the input side with input voltage (I_B versus V_BE) is known as input characteristic, while the variation in the output current with out put voltage (I_C versus V_CE) is known as output characteristics.

A simple circuit for drawing the input and output characteristics of an n-p-n transistor is shown in figure. The corresponding input and output characteristics are shown in figure.

These characteristics are used to calculate the important transistor parameters as follows.

(i) Input resistance (r₁)

The value of r_i is of the order of a few hundred ohm.

(ii) Output resistance (r₀)

I_C changes very little with V_CE after initial rise in I_C, the values of r₀ are very high (of the order of 50 to 100 kW)

(iii) Current amplification factor (b)

We normally work in the region in which I_C is almost independent of V_CE (or varies very slowly with V_CE). This is called the active region.

6.2 TRANSISTOR AS AN AMPLIFIER (CE-configuration)

As shown in the figure the input signal voltage is V_i is connected through a capacitor C₁ so that the biasing dc voltage. V_BB is blocked from going towards the source of signal. The output is taken from the collector resistance R_C the dc voltage, V_CC in the out put is blocked with the help of capacitor C₂. Without signal, a dc current I_B flows through R_B while I_C is the dc collector current. If v_i is applied to the input base emitter side, it will change I_B to I_B + i_B where i_B is due to the signal voltage v_i. The collector current would also change to I_C + I_C where i_C is the collector current due to the input signal. The effective input signal (due to v_i or i_B) to the transistor is the voltage across R_B (input resistance)

The out put signal voltage (v₀) across R_C would be

Therefore, the voltage gain

The above expression is only approximate without considering the effect of transistor parameters like base-emitter resistance, base collector resistance, junction capacitances etc.

The voltage gain of a transistor depends upon frequency because of the presence of junction and external capacitance as shown in frequency response curve.

6.3 TRANSISTOR AS AN OSCILLATOR:

In an oscillator, we get ac output without any external input signal. The output in an oscillator is self-sustained. To attain this, a portion of the output signal is returned back to the input in phase with the input signal this process is termed as positive feedback.

The feedback can be achieved by inductive coupling or LC or RC networks. We consider the circuit shown in figure in which the feedback is accomplished by inductive coupling from one coil winding (T₁) to another coil winding (T₂). Detailed biasing circuits actually used have been emitted for simplicity.

A surge of collector current flows in the transistor when switch S₁ is put ON the first time. This current flows through the coil T₂ where terminals are numbered 3 and 4. This current doesnot reach full amplitude instantaneously but increases from X to Y as shown in figure. The inductive coupling between coil T₂ and coil T₁ now causes a current to flow in the emitter circuit (feedback from input to output). As a result of this positive feedback, this current (In T₁ ; emitter current) also increases from and . The current in T₂ (collector current) connected in the collector circuit acquires the value Y when the transistor becomes saturated. This means that maximum collector current is flowing and can increases no further and there will be no further feedback from T₂ to T₁. without continued feedback, the emitter current begins to fall. Collector current decreases form Y towards Z. However a decreases of collector current causes the magnetic field to decay around the coil T₂. Thus T₁ is now seeing a decaying field in T₂. This causes further decreases in the emitter current till it reaches Z when the transistor is cur off. Therefore, the transistor has reverted back to its original state when the power was first switched on. Now the whole process repeats it self. The time for change from saturation to cut off and back is determined by the constants of tuned circuit. The resonance frequency (f) of this tuned circuit determines the frequency at which the oscillator will oscillate.

In analog signals a continuous range of values of voltages are possible using the two levels of a signal, the high level is termed as 1 while the low level is called ‘O’ to represent the binary digits ‘O’ and I (called bits) using the two levels of signal. We can develop a new subject termed as digital electronics. Our study will be restricted to logic gates, which process the O and 1 level signals in a specific manner.

The functional statement for ‘OR’ gate is the output (Y) of ‘OR’ gate will be 1 when the input A or B or both are 1.

The OR gate in terms of Boolean expression is

This statement can also be given in the form of a table know as truth table, which is given below

Truth table of two input OR gate.

A	B	C
0	0	0
0	1	1
1	0	1
1	1	1

7.1 Diode OR Gate

When A is at +5V, D1 is forward-biased. The current flows via R dropping +5V across it, Y achieves potential +5V
When +5V is applied to B, D₂ conducts making point Y to go to +5V
When both A and B are at +5V. Both the diodes are conducting and the drop across R is +5V
When there are no voltages at either A or B output remains zero.

7.2 AND Gate

The functional statement for AND, gate is the output Y of AND gate is 1, if all the inputs simultaneously have the state 1. The AND gate in terms of Boolean expression is

Y = A.B

The above function can be stated in the form of the following truth table

Truth table of AND gate

A	B	C
0	0	0
0	1	0
1	0	0
1	1	1

There is no supply current and hence no drop across R only when both A and B are at +5V. Only in that case the output Y goes to supply a voltage of +5V.

7.3 NOT Gate:

The output of the NOT gate is not same as the input, we can say that it performs a negation operation on the input. The truth table is given below

Truth table of NOT gate

A	Y
0	0
1	0

when +5V is applied to A, the transistor will be fully ON, drawing maximum collector current. Hence, whole of V_ce = +5V will drop across R, thereby sending Y to 0V. With OV applied at A, the transistor will be cut off and the out put Y, therefore will go to V_cc i.e +5V.

The NOT circuit inverts the wave form as shown below

7.4 NOR Gate

If we put an NOT Gate at the output of OR Gate gives a NOT of OR gate or NOR gate. The Boolean equation for NOR gate is . Truth table for NOR gate can be written as follows.

The NOR Truth Table

A	B
0	0	1
0	1	0
1	0	0
1	1	0

NOR Gate is a universal gate because we can obtain all the possible gates by using this NOR gate as basic building block.

7.5 NAND Gate:

It is a combination of NOT and AND gates in which the negation operation (NOT) is applied after AND gate. (NOT-AND combination NAND). The NAND output is inverse of AND out put . This simply means that for input conditions giving output in AND gate will give output in NAND gate and vice-versa. Hence, truth table for NAND gate will be as under.

TRUTH TABLE FOR NAND GATE

A	B	Y
0	0	1
0	1	1
1	0	1
1	1	0

NAND gate is also called as universal gate

The conventional method of making circuit is connecting chosen component by soldering wires in the desired manner. Such circuits were less reliable and less shock proof. Inspite of the miniaturisation introduced by the discovery of transistors such circuits were still bulky.

The concept of fabricating an entire circuit consisting passive and active components) on a small single block of a semiconductor, such a circuit is known as integrated circuit (IC)

The most widely used technology is the monolithic integrated circuit (mono means single and lithos means stone)

Depending upon the level of integration (i.e. the number of circuit components or logic gates), the ICs are termed as small scale integration (SSI) (logic gates £ 10)

Medium scale integration MSI (logic gates £ 100)
Large scale integration LSI (logic gates £ 1000)
Very large scale integration VLSI (logic gates > 1000)

Brief description of the method of fabricating ICS is as under. Various process involved in the fabrication of an IC are

Epitaxial growth of n- or p-type layers
Oxidation which gives a layer of insulating SiO₂ and can be used to separate one region of the silicon chip from the other.
Photolithography is an important step in the fabrication of monolithic ICS which requires the selective removal of the SiO₂ deliberately formed over the Si-chip. This creates openings in SiO₂ layer through which impurities may be diffused.

On the silicon chip, a thin layer of SiO₂ is first deposited over which a photo-sensitive emulsion called photo-resist is created. This photoresist has the property that the portions exposed to light gets polymerised and resist any chemical etching.

The desired pattern of a mask is kept on the photo-resist and exposed by UV light. As per pattern, some portions will be polymerised while others remain as such.

The chip is then dipped in a solvent which dissolves the unexposed unpolymerirsed portion of the photo-resist. Now it is exposed to chemical etchant which removes SiO₂ leaving exposed Si surface beneath it, through which diffusion/ metallization etc. can be carried out to get a device or circuit.

4. Diffusion of different impurities to obtain different device structures.
Metallization–involves deposition of metal films which inter-connect different components on a chip to obtain the circuit.

However, for getting the complete circuit (IC). The process of marking diffusion oxidation metallization etc, have to be repeated sequentially several times.

What is a p-n junction diode? Explain with the help of a diagram, how is depletion region formed near the junction? Explain also what happens to this layer when the junction is (i) forward biased and (ii) reverse biased.

What is rectification? With the help of a labeled circuit diagram, explain full wave rectification using junction diodes.

With the help of a labeled circuit diagram, explain how n-p-n transistor can be used as an amplifier in common emitter configuration. Show the input and output wave forms.

Give the symbols of n-p-n and p-n-p transistors. Show the biasing of an n-p-n transistor and explain the transistor action.

Explain by drawing a circuit diagram, how an AND gate can be realised in practice using
p-n junction diodes?

With the help of energy band diagram, distinguish between conductor, insulator and semiconductor.

Distinguish between an intrinsic and an extrinsic semiconductor.

What is a Zener diode? Give its symbol. Write its one specific use.

Why is the common emitter amplifier preferred over a common base amplifier?

10. Is the potential difference across the two p–n-junctions in the given circuit same or different?

Choose the correct statement:

(a) When we heat a semiconductor its resistance increases.

(b) When we heat a semiconductor its resistance decreases.

(d) Resistance of a semiconductor is independent of temperature.

Germanium is doped with arsenic, what will be the result?

(a) p-type semi-conductor (b) n-type semi-conductor

3. In a transistor, current gain for common base and common emitter configurations are a and b The relation between a and b is

(a) (b) (c) (d) b = (1-a )

4. A transistor in common base configuration has current gain a = 0.95. It has a change in emitter current of 100 milliampere. Then the change in collector current is

(a) 95 mA (b) 100 mA(c) 99.05 mA(d) 100.95 mA

The value of current gain in common base amplifier is

(a) greater than one (b) less or greater than one

The current gain for a transistor working as common-base amplifier is 0.96. If the emitter current is 7.2 mA, then the base current is

(a) 0.29 mA (b) 0.35 mA (c) 0.39 mA (d) 0.43 mA

Assuming the diodes are ideal, current through the battery is zero

(a) in (i) and (iii) (b) in (ii) and (iii) (c) in only (ii) (d) in only (iii)

8. Assuming ideal diode the current through the 1W resistance in the circuit as shown in the figure is

(a) 2A (b) 1A

The majority of current carrier in an n-type semiconductor are

(a) holes (b) electrons (c) negative ions (d) positive ions

In a forward biased p–n junction, the potential barrier

(a) becomes zero (b) decreases (c) increases (d) remain constant

A transistor can be used as an amplifier when

(a) base-emitter is forward biased and base-collector is reverse biased

(b) both base-emitter and base-collector are reverse biased

(d) none of these

The current gain in the common emitter mode of a transistor is 10. The input impedance is 20 kW and load of resistance is 100 kW. The power gain is

(a) 300 (b) 500 (c) 200 (d) 100

A silicon diode has a threshold voltage of 0.7V. If an input voltage given by 2sin (pt) is supplied to a half-wave rectifier circuit using this diode, the rectifier output has a peak value of

(a) 2V (b) 1.4V (c) 1.3V (d) 0.7V

For a heavily doped n-type semi-conductor Fermi-level lies

(a) a little below the conduction band (b) a little above the valence band

The band diagrams of the three semiconductors are given in the figure. From left to right, they are respectively

(a) n-intrinsic-p (b) p-intrinsic-n (c) intrinsic-p–n (d) p–n-intrinsic

A solid which is not transparent to visible light and whose conductivity increases with temperature is formed by

(a) Metallic binding (b) Ionic binding

In a common base mode of a transistor, the collector current is 5.488 mA for an emitter current of 5.60 mA. The value of the base current amplification factor (b) will be

(a) 48 (b) 49 (c) 50 (d) 51

18. If the lattice constant of this semiconductor is decreased, then which of the following is correct?

(a) All E_C, E_g, E_v decrease (b) All E_C, E_g, E_v increase